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Ortega Lopera, Julio Autor

CMOS CURRENT-MODE MULTIVALUED PLAS

  • PELAYO, FJ
  • PRIETO, A
  • LLORIS, A
  • ORTEGA, J

Ieee Transactions on Circuits and Systems - 1/04/1991

10.1109/31.75400 Ver en origen

Número de citas: 18 (Web of Science) 17 (Scopus)

THE FAST TAMARI TRANSFORM

  • LLORIS, A
  • ORTEGA, J
  • PRIETO, A

Iee Proceedings-E Computers and Digital Techniques - 1/05/1991

10.1049/ip-e.1991.0020 Ver en origen

Número de citas: 3 (Web of Science) 4 (Scopus)
Open Access

USING REED-MULLER COEFFICIENTS TO SYNTHESIZE OPTIMAL PREDICTION MODULES FOR CONCURRENT TESTING

  • ORTEGA, J
  • LLORIS, A
  • PRIETO, A
  • PELAYO, FJ

Electronics Letters - 4/07/1991

10.1049/el:19910779 Ver en origen

Número de citas: 3 (Web of Science) 4 (Scopus)
  • CiteScore: 3,2 (2020)

UNIVERSAL BUILT-IN SELF-TEST PROCEDURE FOR CMOS PLAS

  • ORTEGA, J
  • PRIETO, A
  • LLORIS, A
  • PELAYO, F

Ieee Transactions on Circuits and Systems - 1/08/1991

10.1109/31.85635 Ver en origen

Número de citas: 1 (Web of Science) 1 (Scopus)
Open Access

CMOS IMPLEMENTATION OF A CELLULAR NEURAL NETWORK WITH DYNAMICALLY ALTERABLE CLONING TEMPLATES

  • ANGUITA, M
  • PRIETO, A
  • PELAYO, FJ
  • ORTEGA, J
  • DIAZ, A

LECTURE NOTES IN COMPUTER SCIENCE - 1/1/1991

10.1007/bfb0035902 Ver en origen

Número de citas: 2 (Scopus)
  • CiteScore: 1,8 (2020)
Open Access

AN APPROACH TO ISOLATED WORD RECOGNITION USING MULTILAYER PERCEPTRONS

  • CANAS, A
  • ORTEGA, J
  • FERNANDEZ, FJ
  • PRIETO, A
  • PELAYO, FJ

LECTURE NOTES IN COMPUTER SCIENCE - 1/1/1991

10.1007/bfb0035912 Ver en origen

Número de citas: 2 (Scopus)
  • CiteScore: 1,8 (2020)
Open Access

CMOS IMPLEMENTATION OF SYNAPSE MATRICES WITH PROGRAMMABLE ANALOG WEIGHTS

  • PELAYO, FJ
  • PINO, B
  • PRIETO, A
  • ORTEGA, J
  • FERNANDEZ, FJ

LECTURE NOTES IN COMPUTER SCIENCE - 1/1/1991

10.1007/bfb0035907 Ver en origen

Número de citas: 1 (Web of Science) 1 (Scopus)
  • CiteScore: 1,8 (2020)

ANALOG CMOS IMPLEMENTATION OF A DISCRETE-TIME CNN WITH PROGRAMMABLE CLONING TEMPLATES

  • ANGUITA, M
  • PELAYO, FJ
  • PRIETO, A
  • ORTEGA, J

Ieee Transactions on Circuits and Systems Ii-Analog and Digital Signal Processing - 1/03/1993

10.1109/82.222821 Ver en origen

Número de citas: 15 (Web of Science) 17 (Scopus)
Open Access

Current-mode analogue defuzzifier

  • PELAYO, FJ
  • ROJAS, I
  • ORTEGA, J
  • PRIETO, A

Electronics Letters - 29/04/1993

10.1049/el:19930498 Ver en origen

Número de citas: 11 (Web of Science) 15 (Scopus)
  • CiteScore: 3,2 (2020)

Solution of Switching Equations Based on a Tabular Algebra

  • TRABADO, PP
  • LLORISRUIZ, A
  • ORTEGALOPERA, J

IEEE Transactions on Computers - 1/05/1993

10.1109/12.223678 Ver en origen

Número de citas: 8 (Web of Science) 13 (Scopus)
  • CiteScore: 6,9 (2020)
Open Access

OPTIMIZATION PROBLEMS ON CONCURRENT TESTING SOLVED BY NEURAL NETWORKS

  • ORTEGA, J
  • PRIETO, A
  • PELAYO, FJ
  • LLORIS, A
  • MARTINSMITH, P

Artificial Neural Networks / - 1/1/1991

10.1007/bfb0035918 Ver en origen

Número de citas: 1 (Scopus)
  • CiteScore: 1,8 (2020)

Generación de patrones de test mediante diferencias booleanas y coeficientes de Reed-Muller

  • Consolación Gil Montoya
  • Julio Ortega Lopera

Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria - 1994

Número de citas:
  • Dialnet
Open Access

Asynchronously parallel Boltzmann machines mapped onto distributed-memory multiprocessors

  • Benitez, JM
  • Ortega, J
  • Requena, I
  • Mira, J
  • Sandoval, F

From Natural to Artificial Neural Computation - 1/1/1995

10.1007/3-540-59497-3_246 Ver en origen

Número de citas: 1 (Web of Science) 1 (Scopus)
  • CiteScore: 1,8 (2020)
Open Access

Test pattern generation for analog circuits using neural networks and evolutive algorithms

  • Bernier, JL
  • Merelo, JJ
  • Ortega, J
  • Prieto, A
  • Mira, J
  • Sandoval, F

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/1/1995

10.1007/3-540-59497-3_258 Ver en origen

Número de citas: 1 (Web of Science) 4 (Scopus)
  • CiteScore: 1,8 (2020)

Procedimientos paralelos basados en los coeficientes de Reed-Muller para la generación de patrones de test en circuitos digitales

  • Consolación Gil Montoya
  • Julio Ortega Lopera

1996

Número de citas:
  • Dialnet
Open Access

Modified boltzmann machine for an efficient distributed implementation

  • Ortega, J.
  • Parrilla, L.
  • Prieto, A.
  • Lloris, A.
  • Puntonet, C. G.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/1/1997

10.1007/bfb0032582 Ver en origen

Número de citas:
  • CiteScore: 1,8 (2020)
Open Access

A modified backpropagation algorithm to tolerate weight errors

  • Bernier, J. L.
  • Ortega, J.
  • Prieto, A.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/1/1997

10.1007/bfb0032535 Ver en origen

Número de citas: 3 (Web of Science) 3 (Scopus)
  • CiteScore: 1,8 (2020)
Open Access

Meta-heuristics for circuit partitioning in parallel test generation

  • Gil, C.
  • Ortega, J.
  • Díaz, A.F.
  • Montoya, M.G.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/1/1998

10.1007/3-540-64359-1_702 Ver en origen

Número de citas:
  • CiteScore: 1,8 (2020)
Open Access

Parallel test pattern generation using circuit partitioning in a shared-memory multiprocessor

  • Gil, C.
  • Ortega, J.
  • Bernier, J.L.
  • Gil, M.D.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/1/1998

10.1007/bfb0095334 Ver en origen

Número de citas: 1 (Web of Science) 1 (Scopus)
  • Impacto Normalizado por Categoría: 0,048 (1998)
  • CiteScore: 1,8 (2020)
Open Access

Load balancing in parallel circuit testing with annealing-based and genetic algorithms

  • Gil, C.
  • Ortega, J.
  • Diaz, A. F.
  • Montoya, M. G.
  • Prieto, A.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) - 1/12/1998

10.1007/bfb0056925 Ver en origen

Número de citas: 1 (Web of Science) 1 (Scopus)
  • Impacto Normalizado por Categoría: 0,048 (1998)
  • CiteScore: 1,8 (2020)
Open Access

Application of ANOVA to a cooperative-coevolutionary optimization of RBFNs

  • Rivera, AJ
  • Rojas, I
  • Ortega, J
  • Cabestany, J
  • Prieto, A
  • Sandoval, F

Lecture Notes in Computer Science - 30/9/2005

10.1007/11494669_37 Ver en origen

Número de citas: 1 (Web of Science) 2 (Scopus)
  • CiteScore: 1,8 (2020)
  • SJR: 0,334 (2005)
  • SNIP: 0,787 (2005)

Protocol offload evaluation using simics

  • Ortiz A.
  • Ortega J.
  • Díaz A.
  • Prieto A.

Proceedings - IEEE International Conference on Cluster Computing, ICCC - 1/12/2006

10.1109/clustr.2006.311841 Ver en origen

Número de citas: 3 (Web of Science) 11 (Scopus)

Analyzing the benefits of protocol offload by full-system simulation

  • Ortiz, Andres
  • Ortega, Julio
  • Diaz, Antonio F.
  • Prieto, Alberto
  • DAmbra, P
  • Guarracino, MR

Proceedings - 15th EUROMICRO International Conference on Parallel, Distributed and Network-Based Processing, PDP 2007 - 13/8/2007

10.1109/pdp.2007.24 Ver en origen

Número de citas: 2 (Scopus)

Parallel processing for multi-objective optimization in dynamic environments

  • Cámara M.
  • Ortega J.
  • Toro F.

Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM - 25/9/2007

10.1109/ipdps.2007.370433

Número de citas: 35 (Scopus)
  • Categorías SJR: Hardware and Architecture; Mathematics (miscellaneous); Software

Comparison of techniques for outsourcing protocols | Comparación de tćcnicas para la externalización de protocolos

  • Ortiz A.
  • Ortega J.
  • Díaz A.
  • Prieto A.

CISCI 2008 - Septima Conferencia Iberoamericana en Sistema, Cibernetica e Informatica 5to SIECI 2008, 3er Simposium Internacional en Comunicacion del Conocimiento y Conferencias, CCC 2008 - Memorias - 1/1/2008

Número de citas:
  • Categorías SJR: Artificial Intelligence; Computer Science Applications; Information Systems

Comparison of onloading and offloading strategies to improve network interfaces

  • Ortiz, A.
  • Ortega, J.
  • Díaz, A.F.
  • Prieto, A.

Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2008 - 22/7/2008

10.1109/pdp.2008.20 Ver en origen

Número de citas: 4 (Scopus)
  • Categorías SJR: Computer Networks and Communications; Computer Science (miscellaneous)

A Multi-threaded network interface using network processors

  • Cascon, Pablo
  • Ortega, Julio
  • Haider, Waseem M.
  • Diaz, Antonio F.
  • Rojas, Ignacio
  • ElBaz, D
  • Spies, F
  • Gross, T
... Ver más Contraer

Proceedings of the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2009 - 2009

10.1109/pdp.2009.58 Ver en origen

Número de citas: 1 (Web of Science) 6 (Scopus)

A new Offloaded/Onloaded network interface for high performance communication

  • Ortiz, Andres
  • Ortega, Julio
  • Diaz, Antonio F.
  • Prieto, Alberto
  • ElBaz, D
  • Spies, F
  • Gross, T
... Ver más Contraer

Proceedings of the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2009 - 2009

10.1109/pdp.2009.29 Ver en origen

Número de citas: 3 (Web of Science) 8 (Scopus)

Analyzing approaches for network interface design by HDL simulation

  • Haider W.
  • Ortega J.
  • Díaz A.

Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2009 - 1/12/2009

Número de citas: 2 (Scopus)
  • Categorías SJR: Computational Theory and Mathematics; Computer Networks and Communications; Software

Accelerating OpenFlow switching with network processors

  • Luo Y.
  • Cascon P.
  • Murray E.
  • Ortega J.

ANCS'09: Symposium on Architecture for Networking and Communications Systems - 1/12/2009

10.1145/1882486.1882504

Número de citas: 38 (Scopus)
  • Categorías SJR: Computer Networks and Communications; Electrical and Electronic Engineering; Hardware and Architecture

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Última actualización de los datos: 22/06/24 9:49
Próxima recolección programada: 29/06/24 3:00